mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 113

• Manufacturer Part Number: mt90503
• Description: 2048vc Aal1 Sar
• Manufacturer: Zarlink Semiconductor

Address: 220h
Label: interrupt_flags
Reset Value: 0000h
clkrecovalarm_interrupt_active
Address: 224h
Label: interrupt1_conf
Reset Value: 0000h
erroralarm_interrupt_active
aal0alarm_interrupt_active
tdmalarm_interrupt_active
casalarm_interrupt_active
min_interrupt1_period
interrupt1_polarity
interrupt1_treated
Label
Label
Position
Table 54 - Interrupt Flags Register (continued)
15:14
Table 55 - Interrupt1 Configuration Register
13:0
Bit
Position
Bit
10
11
12
13
14
15
Type
RW
RW
Zarlink Semiconductor Inc.
Type
PUL
RO
RO
RO
RO
RO
MT90503
Number of us between interrupts (minimum). When 0000h,
these is no minimum interval between interrupts.
Programming this prevents the host from being flooded with
interrupts. Each interrupt will last 1 us.
Interrupt polarity and output enable. "00"=active low
(open-collector); "01"=active high (open-collector); "10" =
drive low; "11" = drive high. Drive low or drive high means
that the pin's value will not change regardless of internal
interrupts.
The CAS alarm occurs after the CAS alarm timeout
period or if the CAS buffer becomes half full. This is used
to ensure that the host can empty the CAS change buffer
in a timely manner without having to poll its fill
continuously.
When ’0’, the clock divisor module is held in reset.
The clock recovery alarm occurs after the clock recovery
alarm timeout period or if either clock recovery buffer
becomes half full. This is used to ensure that the host can
empty the clock recovery point buffers in a timely manner
without having to poll its fill continuously.
The AAL0 alarm occurs after the AAL0 alarm timeout
period or if the AAL0 buffer becomes half full. This is used
to ensure that the host can empty the AAL0 cell buffer in a
timely manner without having to poll its fill continuously.
The error alarm occurs after the error alarm timeout
period or if the error report structure buffer becomes half
full. This is used to ensure that the host can empty the
error structure buffer in a timely manner without having to
poll its fill continuously.
Software must write this bit to ’1’, when it has finished
servicing interrupts.
113
Description
Description
Data Sheet