mt47h64m16hw-3 Micron Semiconductor Products, mt47h64m16hw-3 Datasheet - Page 111

• Manufacturer Part Number: mt47h64m16hw-3
• Description: 1gb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Figure 71:
PDF: 09005aef8117c187/Source: 09005aef821aed36
DDR2_x4x8x16_Core2.fm - 1Gb DDR2: Rev. N; Core DDR2: Rev. C 4/08 EN
DQS, DQS#
Command
Address
CK#
CKE
DM
DQ
CK
Power-Down
Valid 1
Valid
T1
Notes:
t CK
power-down
1. If this command is a PRECHARGE (or if the device is already in the idle state), then the
2.
3.
4.
5.
6. No column accesses are allowed to be in progress at the time power-down is entered. If the
mode 6
Enter
NOP
T2
power-down mode shown is precharge power-down. If this command is an ACTIVATE (or if
at least one row is already active), then the power-down mode shown is active power-
down.
t
edges. CKE must remain at the valid input level the entire time it takes to achieve the three
clocks of registration. Thus, after any CKE transition, CKE may not transition from its valid
level during the time period of
t
t
command.
t
via MR (bit 12 = 0).
t
via MR (bit 12 = 1).
DLL was not in a locked state when CKE went LOW, the DLL must be reset after exiting
power-down mode for proper READ operation.
CKE (MIN) of three clocks means CKE must be registered on three consecutive positive clock
IH window.
XP timing is used for exit precharge power-down and active power-down to any nonREAD
XARD timing is used for exit active power-down to READ command if fast exit is selected
XARDS timing is used for exit active power-down to READ command if slow exit is selected
t CH
t CL
T3
t CKE (MIN) 2
T4
111
t IH
t
IS + 2 ×
power-down
t IS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
mode
t
NOP
Exit
CK +
T5
t
IH. CKE must not transition during its
1Gb: x4, x8, x16 DDR2 SDRAM
t XP 3 , t XARD 4
t XARDS 5
NOP
T6
t CKE (MIN) 2
©2003 Micron Technology, Inc. All rights reserved.
Valid
Valid
T7
t IH
Operations
Don’t Care
Valid
Valid
T8
t
IS and