HFC-SP Cologne Chip AG, HFC-SP Datasheet - Page 23

• Manufacturer Part Number: HFC-SP
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

863 C@
3.3
The HFC-SP only uses 2 I/O addresses with SA0 switching between data or control information in ISA-
PC mode and ISA Plug and Play mode. As normal only 10 bits of the ISA-PC bus address are used for
I/O address selection in ISA-PC mode. In ISA Plug and Play mode 12 bits are decoded by the address
decoder.
The HFC-SP has no memory or DMA access to any component on the ISA-PC bus.
Because of its power drive characteristic it needs no external driver for the ISA-PC bus data lines.
If necessary an external bus driver can be added. In this case the output BUSDIR determines the driver
direction.
:Q^eQbi " !
X = don't care
*
ALE must be connected to GND and at least one of the IIOSEL0-3 must be '1' or open!
SA0
X
X
important!
0
0
1
1
ISA-PC bus interface
BUSDIR = 1 means that data is driven into the HFC-SP;
BUSDIR = 0 means that the HFC-SP is read and data is driven to the external bus.
/IOR
X
1
0
1
0
1
/IOW
X
1
1
0
1
0
/AEN
X
1
0
0
0
0
no access
no access
read data
write data
read status
write control
Operation
Cologne
Chip
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