HFC-SP Cologne Chip AG, HFC-SP Datasheet - Page 15

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HFC-SP

Manufacturer Part Number
HFC-SP
Description
Isdn S/t HDLC Basic Rate Controller
Manufacturer
Cologne Chip AG
Datasheet
863C@
2.8
1)
2)
2.9
:Q^eQbi " !
Pin No.
100
94
95
96
97
98
99
open drain, external pull up resistor required
open source, external pull down resistor required
Interrupt outputs
Miscellaneous pins
IRQ_A
/IRQ_P
IRQ_B
/IREQ
IRQ_P
IRQ_C
/WD_RES
IRQ_D
/OE
WD_RES
IRQ_E
/WE
DMARQ0
IRQ_F
/REG
DMARQ1
RESET
Pin Name
Output
Input
O
O
O
O
I/O
O
O
O
O
O
O
O
O
I
I
I
I
1)
2)
1)
2)
1,5,6
2,3,4
1,5
6
2,3,4
1,5,6
2,3,4
1,5
6
2,3,4
1,5
6
2,3,4
1,5
6
2,3,4
all
Mode
Function
PC bus interrupt request A or interrupt input from
external device (see: CIRM register bit description)
processor interrupt request low active
PC bus interrupt request B
Interrupt request (low active)
processor interrupt request high active
PC bus interrupt request C
Watchdog expired, external reset low active
PC bus interrupt request D
Output enable (low active)
Watchdog expired, external reset high active
PC bus interrupt request E
Write enable (low active)
DMA request AUX1 channel register (high active)
PC bus interrupt request F
Register select and I/O enable (low active)
DMA request AUX2 channel register (high active)
Reset for HFC-SP (high active)
Cologne
Chip
!% _V (#

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