SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 912

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 44-5. TFT Panel Timing (Line Expanded View), CLKMOD=1
912
LCDVSYNC
LCDHSYNC
LCDDOTCK
LCDDEN
AT91SAM9263
LCDD
--------------------------- -
f
LCDVSYNC
VHDLY+1
1
=
Usually the LCD_FRM rate is about 70 Hz to 75 Hz. It is given by the following equation:
where:
In STN Mode:
In monochrome mode, Horizontal_display_size is equal to the number of horizontal pixels. The
number_data_lines is equal to the number of bits of the interface in single scan mode;
number_data_lines is equal to half the bits of the interface in dual scan mode.
In color mode, Horizontal_display_size equals three times the number of horizontal pixels.
In TFT Mode:
The frame rate equation is used first without considering the clock periods added at the end
beginning or at the end of each line to determine, approximately, the LCDDOTCK rate:
With this value, the CLKVAL is fixed, as well as the corresponding LCDDOTCK rate.
Then select VHDLY, HPW and HBP according to the type of LCD used and
page
• HOZVAL determines de number of LCDDOTCK cycles per line
• LINEVAL determines the number of LCDHSYNC cycles per frame, according to the
⎛
⎝
HPW+1
VHDLY
-------------------------------------------------------------------------------------------------------------------- -
expressions shown below:
909.
+
HBP+1
HPW
f
HOZVAL
LINEVAL
HOZVAL
LINEVAL
lcd_pclk
+
f
LCDDOTCK
HBP
1 PCLK
=
=
=
=
=
(
HOZVAL
+
Horizontal_display_size
-------------------------------------------------------------- - 1
Horizontal_display_size 1
Vertical_display_size 1
Vertical_display_size 1
HOZVAL
Line Period
Number_data_lines
1/2 PCLK 1/2 PCLK
+
5
+
)
HFP
×
(
f
lcd_vsync
+
5
⎞ VBP
⎠
HOZVAL+1
(
–
–
–
–
×
(
+
LINEVAL
LINEVAL
+
+
1
VFP
)
)
+
1
)
6249I–ATARM–3-Oct-11
“Equation 1” on
HFP+2