SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 493

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 33-20. Programmer Sends Data While the Bus is Busy
Figure 33-21. Arbitration Cases
493
Data from a Master
TWI DATA transfer
TWI DATA transfer
Data from TWI
(DADR + W + START + Write THR)
(DADR + W + START + Write THR)
AT91SAM9263
ARBLST
TWCK
A transfer is programmed
TWCK
TWD
TWD
A transfer is programmed
TWCK
TWD
Note:
The flowchart shown in
in Multi-master mode.
7. If TWI has to be set in Slave mode, wait until TXCOMP flag is at 1 and then program the
Slave mode.
S
S
S
In the case where the arbitration is lost and TWI is addressed, TWI will not acknowledge even if it
is programmed in Slave mode as soon as ARBLST is set to 1. Then, the Master must repeat
SADR.
DATA sent by a master
1
1
1
Transfer is stopped
Bus is busy
0 0
0
0 0
1
STOP sent by the master
Transfer is kept
1 1
1 1
TWI stops sending data
Arbitration is lost
Figure 33-22 on page 494
(DADR + W + START + Write THR)
Transfer is programmed again
Data from the master
Bus is busy
Transfer is kept
Bus is free
Bus is considered as free
Transfer is initiated
P
P
Bus is free
gives an example of read and write operations
Bus is considered as free
Transfer is initiated
START sent by the TWI
S
S
S
1
1
1
0
0 0
0
DATA sent by the TWI
1
0
The master stops sending data
1 1
1 1
Arbitration is lost
Data from the TWI
6249I–ATARM–3-Oct-11