SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 318

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SAM9263

Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9263

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
25.4.14
Name: DMAC_ClearTfr, DMAC_ClearBlock, DMAC_ClearSrcTran, DMAC_ClearDstTran,DMAC_ClearErr
Address:0x00800338
Address:0x00800340
Address:0x00800348
Address:0x00800350
Address:0x00800358
Access: Write
Reset: 0x0
• CLEARx: Interrupt Clear
0 = No effect
1 = Clear interrupt
Each bit in the Raw Status and Status registers is cleared on the same cycle by writing a 1 to the corresponding location in
the Clear registers: DMAC_ClearTfr, DMAC_ClearBlock, DMAC_ClearSrcTran, DMAC_ClearDstTran, DMAC_ClearErr.
Each Interrupt Clear register has a bit allocated per channel, for example, DMAC_ClearTfr[2] is the clear bit for Channel 2’s
transfer complete interrupt. Writing a 0 has no effect. These registers are not readable.
318
31
23
15
7
AT91SAM9263
Interrupt Clear Registers
30
22
14
6
29
21
13
5
28
20
12
4
27
19
11
3
26
18
10
2
CLEAR1
25
17
9
1
6249I–ATARM–3-Oct-11
CLEAR0
24
16
8
0

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