SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 291

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SAM9263

Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9263

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 25-12. DMA Transfer Flow for Source Address Auto-reloaded and Linked List Destination Address
25.3.5.6
6249I–ATARM–3-Oct-11
Multi-block Transfer with Source Address Auto-reloaded and Contiguous Destination Address (Row 3)
DMAC Transfer Complete
interrupt generated here
1. Read the Channel Enable register to choose a free (disabled) channel.
2. Clear any pending interrupts on the channel from the previous DMA transfer by writing
3. Program the following channel registers:
to the Interrupt Clear registers: DMAC_ClearTfr, DMAC_ClearBlock,
DMAC_ClearSrcTran, DMAC_ClearDstTran, DMAC_ClearErr. Reading the Interrupt
Raw Status and Interrupt Status registers confirms that all interrupts have been
cleared.
Block Complete interrupt
generated here
Channel Disabled by
hardware
yes
Source/destination status fetch
DMAC State Machine Table?
Stall until block interrupt
DMAC block transfer
Hardware reprograms
MASKBLOCK[X]=1 ?
Cleared by hardware
DARx, CTLx, LLPx
CTLx.INT_EN=1
Channel Enabled by
Row1 or Row5 of
Reload SARx
LLI Fetch
Is DMAC in
software
&&
no
yes
AT91SAM9263
no
291

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