SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 692

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SAM9263

Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9263

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
37.8.8
Name:
Address:
Access Type:Read-only
• MTIMESTAMPx: Timestamp
This field represents the internal CAN controller 16-bit timer value.
If the TEOF bit is cleared in the CAN_MR register, the internal Timer Counter value is captured in the MTIMESTAMP field
at each start of frame. Else the value is captured at each end of frame. When the value is captured, the TSTP flag is set in
the CAN_SR register. If the TSTP mask in the CAN_IMR register is set, an interrupt is generated while TSTP flag is set in
the CAN_SR register. This flag is cleared by reading the CAN_SR register.
Note:
6249I–ATARM–3-Oct-11
MTIMESTAM
MTIMESTAM
P15
P7
31
23
15
7
The CAN_TIMESTP register is reset when the CAN is disabled then enabled thanks to the CANEN bit in the CAN_MR.
CAN Timestamp Register
CAN_TIMESTP
0xFFFAC01C
MTIMESTAM
MTIMESTAM
P14
P6
30
22
14
6
MTIMESTAM
MTIMESTAM
P13
P5
29
21
13
5
MTIMESTAM
MTIMESTAM
P12
28
20
12
P4
4
MTIMESTAM
MTIMESTAM
P11
P3
27
19
11
3
MTIMESTAM
MTIMESTAM
P10
P2
26
18
10
2
MTIMESTAM
MTIMESTAM
AT91SAM9263
P9
P1
25
17
9
1
MTIMESTAM
MTIMESTAM
P8
P0
24
16
8
0
692

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