ATmega32 Atmel Corporation, ATmega32 Datasheet - Page 32

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ATmega32

Manufacturer Part Number
ATmega32
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega32

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Power
Management
and Sleep
Modes
MCU Control Register
– MCUCR
2503Q–AVR–02/11
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the MCUCR Register
select which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or
Extended Standby) will be activated by the SLEEP instruction. See
an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is
then halted for four cycles in addition to the start-up time, it executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a Reset occurs during sleep
mode, the MCU wakes up and executes from the Reset Vector.
Figure 11 on page 24
tion. The figure is helpful in selecting an appropriate sleep mode.
The MCU Control Register contains control bits for power management.
• Bit 7 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmers
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bits [6:4] – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the six available sleep modes as shown in
Table 13. Sleep Mode Select
Note:
Bit
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby mode and Extended Standby mode are only available with external crystals or
resonators.
R/W
SE
7
0
SM1
0
0
1
1
0
0
1
1
presents the different clock systems in the ATmega32, and their distribu-
SM2
R/W
6
0
SM1
R/W
5
0
SM0
0
1
0
1
0
1
0
1
SM0
R/W
4
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
Extended Standby
ISC11
R/W
3
0
(1)
ISC10
R/W
2
0
(1)
ISC01
R/W
1
0
Table 13
Table
ATmega32(L)
ISC00
R/W
0
0
13.
for a summary. If
MCUCR
32

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