ATmega32 Atmel Corporation, ATmega32 Datasheet - Page 232

• Manufacturer Part Number: ATmega32
• Manufacturer: Atmel Corporation

Specifications of ATmega32

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Scanning the Analog
Comparator
2503Q–AVR–02/11
Figure 120. Boundary-scan Cells for Oscillators and Clock Options
Table 89
XTAL1/XTAL2 connections as well as 32kHz Timer Oscillator.
Table 89. Scan Signals for the Oscillators
Notes:
The relevant Comparator signals regarding Boundary-scan are shown in
Boundary-scan cell from
described in
The Comparator need not be used for pure connectivity testing, since all analog inputs are
shared with a digital port pin as well.
Enable Signal
EXTCLKEN
OSCON
RCOSCEN
OSC32EN
TOSKON
1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift between
3. The clock configuration is programmed by fuses. As a fuse is not changed run-time, the clock
Previous
From
Cell
summaries the scan registers for the external clock pin XTAL1, Oscillators with
the Internal Oscillator and the JTAG TCK clock. If possible, scanning an external clock is
preferred.
configuration is considered fixed for a given application. The user is advised to scan the same
clock option as to be used in the final system. The enable signals are supported in the scan
chain because the system logic can disable clock options in sleep modes, thereby disconnect-
ing the Oscillator pins from the scan path if not provided. The INTCAP fuses are not supported
in the scan-chain, so the boundary scan chain can not make a XTAL Oscillator requiring inter-
nal capacitors to run unless the fuse is correctly programmed.
ShiftDR
Table
0
1
ClockDR
RCCK
TOSCK
Scanned Clock Line
EXTCLK (XTAL1)
OSCCK
OSC32CK
90.
D
UpdateDR
Q
Next
Cell
To
Figure 122
D
G
Q
EXTEST
0
1
is attached to each of these signals. The signals are
Clock Option
External Clock
External Crystal
External Ceramic
Resonator
External RC
Low Freq. External Crystal
32kHz Timer Oscillator
XTAL1/TOSC1
(1)(2)(3)
ENABLE
Oscillator
XTAL2/TOSC2
OUTPUT
Previous
Scanned Clock Line
when not Used
From
Cell
ATmega32(L)
ShiftDR
0
1
ClockDR
0
0
1
0
0
D
Figure
FF1
Q
Next
Cell
To
121. The
232