AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 91

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AT89C51RE2

Manufacturer Part Number
AT89C51RE2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RE2

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Uart
2
Sram (kbytes)
8.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/OCD
Watchdog
Yes

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Figure 33. PCA Compare Mode and PCA Watchdog Timer
High Speed Output
Mode
7663E–8051–10/08
CCAPnH
Write to
1
CCAPnL
Write to
0
Reset
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value, other-
wise an unwanted match could happen. Writing to CCAPnH will set the ECOM bit.
Once ECOM set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t occur
while modifying the compare value. Writing to CCAPnH will set ECOM. For this reason, user
software should write CCAPnL first, and then CCAPnH. Of course, the ECOM bit can still be
controlled by accessing to CCAPMn register.
In this mode the CEX output (on port 1) associated with the PCA module will toggle each time a
match occurs between the PCA counter and the module's capture registers. To activate this
mode the TOG, MAT, and ECOM bits in the module's CCAPMn SFR must be set (See
Figure 34).
A prior write must be done to CCAPnL and CCAPnH before writing the ECOMn bit.
Enable
CCAPnH
CH
PCA counter/timer
16 bit comparator
CIDL
CF
ECOMn
WDTE
CCAPnL
CR
CL
CAPPn
Match
CAPNn MATn TOGn PWMn ECCFn
CCF4
CCF3
CCF2 CCF1 CCF0
CPS1 CPS0
ECF
CCON
0xD8
CCAPMn, n = 0 to 4
0xDA to 0xDE
CMOD
0xD9
AT89C51RE2
PCA IT
RESET *
91

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