AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 14

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AT89C51RE2

Manufacturer Part Number
AT89C51RE2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RE2

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Uart
2
Sram (kbytes)
8.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/OCD
Watchdog
Yes

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Figure 3. Mode Switching Waveforms
14
AT89C51RE2
XTAL1
XTAL1:2
X2 bit
CPU clock
STD Mode
The X2 bit in the CKCON0 register (see Table 15) allows a switch from 12 clock periods per
instruction to 6 clock periods and vice versa. At reset, the speed is set according to X2 bit of the
Fuse Configuration Byte (FCB). By default, Standard mode is active. Setting the X2 bit activates
the X2 feature (X2 mode).
The T0X2, T1X2, T2X2, UartX2, PcaX2, and WdX2 bits in the CKCON0 register (See Table 15.)
and SPIX2 bit in the CKCON1 register (see Table 16) allows a switch from standard peripheral
speed (12 clock periods per peripheral clock cycle) to fast peripheral speed (6 clock periods per
peripheral clock cycle). These bits are active only in X2 mode.
F
X2 Mode
OSC
STD Mode
7663E–8051–10/08

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