AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 32

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AT89C51RE2

Manufacturer Part Number
AT89C51RE2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RE2

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Uart
2
Sram (kbytes)
8.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/OCD
Watchdog
Yes

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Boot process
Figure 12. Boot Reset vector configuration
32
EA pin
0
1
AT89C51RE2
Hardware conditions
YES
NO
The BRV2-0 bits of the FCB (see Table 20 on page 34), the EA pin value upon reset and the
presence of the external hardware conditions, allow to modify the default reset vector of the
AT89C51RE2.
The Hardware conditions (EA = 1, PSEN = 0) during the Reset falling edge force the on-chip
bootloader execution. This allows an application to be built that will normally execute the end
user’s code but can be manually forced into default ISP operation. The hardware conditions
allows to force the enter in ISP mode whatever the configurations bits.
X
BRV2-0
1 1 1
1 1 0
1 0 1
1 0 0
0 1 1
0 1 0
0 0 1
0 0 0
X
X
(FM0 at address 0x0000 with bank 0 mapped)
RM0 at address 0x0000 (ATMEL Bootloader)
RM0 at address 0x0000 (ATMEL Bootloader)
FM0 at address 0x0000 with bank0 mapped
FM0 at address 0xFFFC in Bank 0
FM0 at address 0xFFFC in Bank 1
FM0 at address 0xFFFC in Bank 2
External Code at address 0x0000
MCU reset vector
Reserved
7663E–8051–10/08

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