AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 53

• Manufacturer Part Number: AT89C51RE2
• Manufacturer: Atmel Corporation

Specifications of AT89C51RE2

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Spi: 1
• Uart: 2
• Sram (kbytes): 8.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART/OCD
• Watchdog: Yes

Bootloader Architecture
Introduction
7663E–8051–10/08
Specific Protocol
External Host with
Communication
The bootloader manages a communication between a host platform running an ISP tool and a
AT89C51RE2 target.
The bootloader implemented in AT89C51RE2 is designed to reside in the dedicated ROM bank.
This memory area can only be executed (fetched) when the processor enters the boot process.
The implementation of the bootloader is based on standard set of libraries including INTEL hex
based protocol, standard communication links and ATMEL ISP command set.
Figure 19. Bootloader Functional Description
On the above diagram, the on-chip bootloader processes are:
•
The purpose of this process is to manage the communication and its protocol between the on-
chip bootloader and a external device. The on-chip ROM implement a serial protocol (see sec-
tion Bootloader Protocol). This process translate serial communication frame (UART) into Flash
memory access (read, write, erase...).
•
This process manages low level access to Flash memory (performs read and write access).
ISP Communication Management
Memory Management
ISP Communication
Management
Management
Memory
Memory
Bootloader
AT89C51RE2
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