AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 55

• Manufacturer Part Number: AT89C51RE2
• Manufacturer: Atmel Corporation

Specifications of AT89C51RE2

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Spi: 1
• Uart: 2
• Sram (kbytes): 8.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART/OCD
• Watchdog: Yes

7663E–8051–10/08
The communication link detection is done by a circular polling on all the interfaces. On
AT89C51RE2, the ISP interfaces are all based on simple UART mechanisms (Rx, Tx).
The Rx line default state is ‘1’ when no communication is in progress. A transition from ‘1’ to ‘0’
on the Rx line indicates a start of frame.
Once one of the interface detects a starts of frame (‘0’) on its Rx line, the interface is selected
and configuration of the communication link starts.
Figure 20. Communication link Detection
Notes:
1. SF: Start of Frame (‘0’ = detected; ‘1’ = not detected)
2. In AT89C51RE2 implementation, Interface 1 refers to UART0 and Interface 2 refers to the
OCD UART interface.
Interface 1
Interface 2
Detection
No
No
SF = 0
SF = 0
Start
Yes
Yes
Initialisation
Interface 2
Start Bootloader
Initialisation
Interface 1
AT89C51RE2
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