AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 70

• Manufacturer Part Number: AT89C51RE2
• Manufacturer: Atmel Corporation

Specifications of AT89C51RE2

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Spi: 1
• Uart: 2
• Sram (kbytes): 8.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART/OCD
• Watchdog: Yes

Mode 2 (8-bit Timer
with Auto-Reload)
Figure 25. Timer/Counter x (x = 0 or 1) in Mode 2
Mode 3 (Two 8-bit
Timers)
Figure 26. Timer/Counter 0 in Mode 3: Two 8-bit Counters
70
INT0#
See the “Clock” section
See the “Clock” section
INTx#
AT89C51RE2
CLOCK
CLOCK
CLOCK
T0
FTx
Tx
FTx
FTx
TMOD reg
GATEx
GATE0
TMOD.3
÷ 6
÷ 6
÷ 6
Mode 2 configures Timer 0 as an 8-bit Timer (TL0 register) that automatically reloads from TH0
register (see Figure 25). TL0 overflow sets TF0 flag in TCON register and reloads TL0 with the
contents of TH0, which is preset by software. When the interrupt request is serviced, hardware
clears TF0. The reload leaves TH0 unchanged. The next reload value may be changed at any
time by writing it to TH0 register.
Mode 3 configures Timer 0 such that registers TL0 and TH0 operate as separate 8-bit Timers
(see Figure 26). This mode is provided for applications requiring an additional 8-bit Timer or
Counter. TL0 uses the Timer 0 control bits C/T0# and GATE0 in TMOD register, and TR0 and
TF0 in TCON register in the normal manner. TH0 is locked into a Timer function (counting F
/6) and takes over use of the Timer 1 interrupt (TF1) and run control (TR1) bits. Thus, operation
of Timer 1 is restricted when Timer 0 is in mode 3.
TMOD reg
TMOD.2
C/T0#
C/Tx#
0
1
0
1
TCON reg
TCON.4
TR0
TRx
TCON.6
TR1
(8 bits)
(8 bits)
(8 bits)
(8 bits)
TH0
THx
TLx
TL0
Overflow
Overflow
Overflow
TCON reg
TCON.5
TCON.7
TFx
TF0
TF1
Timer x
Interrupt
Request
Timer 0
Interrupt
Request
Timer 1
Interrupt
Request
7663E–8051–10/08
PER