AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 33

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AT89C51RE2

Manufacturer Part Number
AT89C51RE2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RE2

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Uart
2
Sram (kbytes)
8.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/OCD
Watchdog
Yes

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FM0 Memory
Architecture
User Space
Extra Row (XRow or
XAF)
Hardware security Byte
(HSB)
7663E–8051–10/08
The FM0 flash memory is made up of 5 blocks:
1. The memory array (user space) 128K bytes
2. The Extra Row also called FM0 XAF
3. The Hardware security bits (HSB)
4. The Fuse Configuration Byte (FCB)
5. The column latch
This space is composed of a 128K bytes Flash memory organized in 1024 pages of 128 bytes. It
contains the user’s application code. This block can be access in Read/write mode from FM0
and boot memory area. (When access in write mode from FM0, the CPU core enter pseudo idle
mode).
This row is a part of FM0 and has a size of 128 bytes. The extra row (XAF) may contain informa-
tion for boot loader usage.This block can be access in Read/write mode from FM0 and boot
memory area. (When access in write mode from FM0, the CPU core enter pseudo idle mode).
The Hardware security Byte is a part of FM0 and has a size of 1 byte.
The 8 bits can be read/written by software (from FM0 or RM0) and written by hardware in paral-
lel mode.
The HSB bits can be written to ‘0’ without any restriction (increase the security level of the chip),
but can be written to ‘1’ only when the corresponding memory area of the lock bits was full chip
erased.
Table 19. Hardware Security Byte (HSB)
Number
Bit
6-4
2-0
7
3
7
-
Mnemonic
FLB2-0
Bit
-
-
-
6
-
Description
Unused
Reserved
Unused
FM0 Memory Lock Bits
See Table 32 on page 52
5
-
4
-
3
-
FLB2
2
AT89C51RE2
FLB1
1
FLB0
0
33

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