AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 161

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AT89C51RE2

Manufacturer Part Number
AT89C51RE2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RE2

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Uart
2
Sram (kbytes)
8.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/OCD
Watchdog
Yes

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Power Monitor
Description
7663E–8051–10/08
The POR/PFD function monitors the internal power-supply of the CPU core memories and the
peripherals, and if needed, suspends their activity when the internal power supply falls below a
safety threshold. This is achieved by applying an internal reset to them.
By generating the Reset the Power Monitor insures a correct start up when AT89C51RE2 is
powered up.
In order to startup and maintain the microcontroller in correct operating mode, V
bilized in the V
compatible with logic level VIH/VIL.
These parameters are controlled during the three phases: power-up, normal operation and
power going down. See Figure 66.
Figure 66. Power Monitor Block Diagram
Note:
The Voltage regulator generates a regulated internal supply for the CPU core the memories and
the peripherals. Spikes on the external Vcc are smoothed by the voltage regulator.
RST pin
1. Once XTAL1 High and low levels reach above and below VIH/VIL. a 1024 clock period delay
XTAL1
will extend the reset coming from the Power Fail Detect. If the power falls below the Power Fail
Detect threshold level, the Reset will be applied immediately.
CC
PCA
Watchdog
operating range and the oscillator has to be stabilized with a nominal amplitude
Voltage Regulator
Power Fail Detect
Power On Reset
(1)
Hardware
Watchdog
VCC
Regulated
Supply
Internal Reset
Peripherals
CPU core
Memories
AT89C51RE2
CC
has to be sta-
161

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