AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 39

• Manufacturer Part Number: AT89C51RE2
• Manufacturer: Atmel Corporation

Specifications of AT89C51RE2

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Spi: 1
• Uart: 2
• Sram (kbytes): 8.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART/OCD
• Watchdog: Yes

Mapping of the
Memory Space
7663E–8051–10/08
By default, the user space is accessed by MOVC A, @A+DPTR instruction for read only. Setting
FPS bit in FCON register takes precedence on the EXTRAM bit in AUXR register.
The other memory spaces (user, extra row, hardware security) are made accessible in the code
segment by programming bits FMOD2:0 in FCON register in accordance with Table 25. A
MOVC instruction is then used for reading these spaces.
Thanks to the columns latches access, it is possible to write FM0 array, HSB and extra row
blocks. The column latches space is made accessible by setting the FPS bit in FCON register.
Writing is possible from 0000h to FFFFh, address bits 6 to 0 are used to select an address within
a page while bits 14 to 7 are used to select the programming address of the page.
Table 25. .FM0 blocks select bits
FMOD2
0
0
0
0
1
1
1
1
FMOD1
0
0
1
1
0
0
1
1
FMOD0
0
1
0
1
0
1
0
1
FM0 array(0000h-FFFFh)
Extra Row(00h-80h)
Erase FM0
Column latches reset
HSB
FCB
Reserved
Adressable Space
AT89C51RE2
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