GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 12

• Manufacturer Part Number: GD82559C S L3DF
• Manufacturer: Intel

Specifications of GD82559C S L3DF

• Lead Free Status / Rohs Status: Not Compliant

82559 — Networking Silicon
2.2
4
micromachine during the processing of transmit or receive frames by the 82559. A typical
micromachine function is to transfer a data buffer pointer field to the 82559 DMA unit for direct
access to the data buffer. The micromachine is divided into two units, Receive Unit and Command
Unit which includes transmit functions. These two units operate independently and concurrently.
Control is switched between the two units according to the microcode instruction flow. The
independence of the Receive and Command units in the micromachine allows the 82559 to execute
commands and receive incoming frames simultaneously, with no real-time CPU intervention.
The 82559 contains an interface to an external Flash memory, an external serial EEPROM, and
modem. These three interfaces are multiplexed, and both read and write accesses are supported.
The Flash may be used for remote boot functions, network statistical and diagnostics functions, and
management functions. The Flash is mapped into host system memory (anywhere within the 32-bit
memory address space) for software accesses. It is also mapped into an available boot expansion
ROM location during boot time of the system. More information on the Flash interface is detailed
in
information for a LAN connection such as node address, as well as board manufacturing and
configuration information. Both read and write accesses to the EEPROM are supported by the
82559. Information on the EEPROM interface is detailed in
Interface.” The modem interface uses an ISA-like signal and is described in more detail in
6.0, “82559 Modem
FIFO Subsystem Overview
The 82559 FIFO subsystem consists of a 3 Kbyte transmit FIFO and 3 Kbyte receive FIFO. Each
FIFO is unidirectional and independent of the other. The FIFO subsystem serves as the interface
between the 82559 parallel side and the serial CSMA/CD unit. It provides a temporary buffer
storage area for frames as they are either being received or transmitted by the 82559, which
improves performance:
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Section 4.6, “Parallel Flash/Modem
Transmit frames can be queued within the transmit FIFO, allowing back-to-back transmission
within the minimum Interframe Spacing (IFS).
The storage area in the FIFO allows the 82559 to withstand long PCI bus latencies without
losing incoming data or corrupting outgoing data.
The 82559 transmit FIFO threshold allows the transmit start threshold to be tuned to eliminate
underruns while concurrent transmits are being performed.
The FIFO subsection allows extended PCI zero wait state burst accesses to or from the 82559
for both transmit and receive frames since the transfer is to the FIFO storage area rather than
directly to the serial link.
Transmissions resulting in errors (collision detection or data underrun) are retransmitted
directly from the 82559 FIFO, increasing performance and eliminating the need to re-access
this data from the host system.
Incoming runt receive frames (in other words, frames that are less than the legal minimum
frame size) can be discarded automatically by the 82559 without transferring this faulty data to
the host system.
Functionality.”
Interface.” The EEPROM is used to store relevant
Section 4.7, “Serial EEPROM
Datasheet
Section