GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 60

no-image

GD82559C S L3DF

Manufacturer Part Number
GD82559C S L3DF
Description
Manufacturer
Intel
Datasheet

Specifications of GD82559C S L3DF

Lead Free Status / Rohs Status
Not Compliant
82559 — Networking Silicon
52
Dx (x>0):
Force TCO Mode:
When the 82559 is in the force TCO mode, it may receive packets directly to the TCO controller.
TCO packet reception and filtering is controlled by the set receive enable command from the TCO
controller. After receiving a TCO packet, the 82559 increments its nominal receive statistic
counters as well as the receive TCO counter.
Receive TCO Packets
Read 82559 Status (Power Management and Link State)
Set Force TCO Mode
When the 82559 is in a low power state (D1, D2, or D3), it may receive TCO packets directly
to the TCO controller. TCO packet reception is enabled by setting the receive enable command
from the TCO controller. Although TCO packets can match other wake-up filters, once it is
identified as a TCO packet, no further matching is performed. When TCO reception is
disabled, a TCO packet may cause a power management event if configured to so by the load
wake-up packet command.
Configuration Commands
The 82559 completes the following process for the during nominal operation of the
transmit command in TCO mode.
1.
2.
3.
4.
5.
6.
During the this time, the receive flow is not affected.
The 82559 supports receive flow towards the TCO controller. The 82559 can transfer
either TCO packets or packets that pass MAC address filtering according to its
configuration and mode of operation. If the 82559 is configured to transfer only TCO
packets, it supports Ethernet Type II packets with optional VLAN tagging.
The TCO controller is capable of reading the 82559’s power state and link status.
Following a status change the 82559 issues an SMB alert and the TCO entity reads the
new power state.
The TCO controller can set the 82559 into the Force TCO mode. The 82559 is set back to
the nominal operation following a PCI RST# or ALTRST#. After the transition from
normal operation to TCO mode, the 82559 aborts transmit and receive operations and
clears its memory structures. The TCO may configure the 82559 before it starts transmit
and receive operations if required.
Caution: The Force TCO is a destructive command. It causes the 82559 to lose its
memory structures. Also, in Force TCO mode, the 82559 ignores PCI cycles. Therefore, it
is highly recommended to use this command by the TCO controller at system emergency
only.
While the 82559 is in the force TCO mode it supports the Configure CSMA, Individual
Address Setup, Multicast Setup, Load Microcode commands and allows read/write access
to the PHY registers.
The 82559 completes the current transmit DMA.
The 82559 sets the TCO request bit in the TCO State register.
The 82559 responds to the TCO controller’s transmit request.
Upon completion of the TCO transmit DMA, the 82559 increments the transmit TCO
statistic counter.
Upon completion of the transmit operation, the 82559 increments the nominal
transmit statistic counters and clears the TCO request bit in the TCO State register.
The 82559 resumes its normal transmit flow.
Datasheet

Related parts for GD82559C S L3DF