GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 17

• Manufacturer Part Number: GD82559C S L3DF
• Manufacturer: Intel

Specifications of GD82559C S L3DF

• Lead Free Status / Rohs Status: Not Compliant

3.2.3
Datasheet
System and Power Management Signals
CLK
CLKRUN#
RST#
PME#
(PCI)
CSTSCHG
(CardBus)/
WOL (PCI)
ISOLATE#
ALTRST#
VIO
Symbol
IN
IN/OUT
O/D
IN
O/D
OUT
IN
IN
B
IN
Type
Clock. The Clock signal provides the timing for all PCI transactions
and is an input signal to every PCI device. The 82559 requires a PCI
Clock signal (frequency greater than or equal to 16 MHz) for nominal
operation. The 82559 supports Clock signal suspension using the
Clockrun protocol.
Clockrun. The Clockrun signal is used by the system to pause or slow
down the PCI Clock signal. It is used by the 82559 to enable or disable
suspension of the PCI Clock signal or restart of the PCI clock. When
the Clockrun signal is not used, this pin should be connected to an
external pull-down resistor.
Reset. The PCI Reset signal is used to place PCI registers,
sequencers, and signals into a consistent state. When RST# is
asserted, all PCI output signals will be tri-stated.
Power Management Event. The Power Management Event signal
indicates that a power management event has occurred in a PCI bus
system.
Card Status Change/Wake on LAN. This pin is multiplexed to
provide Card Status Change or Wake on LAN signals. In a CardBus
system, it is used as the Card Status Change output signal and is an
asynchronous signal to the Clock signal. It indicates that a power
management event has occurred in a CardBus system. In a PCI
system, it is used as the WOL pin and provides a positive pulse of
approximately 52 ms upon detection of an incoming Magic Packet*.
Isolate. The Isolate signal is used to isolate the 82559 from the PCI
bus. When Isolate is active (low), the 82559 does not drive its PCI
outputs (except PME# and CSTSCHG) or sample its PCI inputs
(including CLK and RST#). If the 82559 is not powered by an auxiliary
power source, the ISOLATE# pin must be pulled high through a
100 KΩ resistor.
Alternate Reset. The Alternate Reset signal is used to reset the
82559 on power-up. In systems that support an auxiliary power supply,
ALTRST# should be connected to a power-up detection circuit.
Otherwise, ALTRST# should be tied to V
Voltage Input/Output. The VIO pin is the voltage bias pin for the PCI
interface. In a 5 V or 3.3 V signaling environment, it should be
connected through a 100 KΩ resistor to the 5 V or 3.3 V supply.The
resistor acts as a leakage current limiter in systems where the VIO
bias voltage may be turned off.
Name and Function
CC
.
Networking Silicon — 82559
9