GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 109
GD82559C S L3DF
Manufacturer Part Number
GD82559C S L3DF
Description
Manufacturer
Intel
Datasheet
1.GD82559C_S_L3DF.pdf
(120 pages)
Specifications of GD82559C S L3DF
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12.4
12.4.1
12.4.1.1
12.4.1.2
Datasheet
Figure 29. PCI/CardBus Clock Waveform
Table 37. PCI/CardBus Clock Specifications
Table 38. X1 Clock Specifications
Timing Specifications
Clocks Specifications
PCI/CardBus Clock Specifications
The 82559 uses the PCI Clock signal directly.
measurement points for the PCI Clock signal.
NOTES:
X1 Specifications
X1 serves as a signal input from an external crystal or oscillator.
requirements from this signal.
T1
T2
T3
T4
1. The 82559 will work with any PCI clock frequency up to 33 MHz.
2. Rise and fall times are specified in terms of the edge rate measured in V/ns. This slew rate is met across the
T8
T9
0.325V
minimum peak-to-peak portion of the clock waveform as shown in
T
T
T
T
Tx1_dc
Tx1_pr
0.4V
cyc
slew
0.475V
high
low
CC
Symbol
Symbol
CC
CC
CLK Cycle Time
CLK High Time
CLK Low Time
CLK Slew Rate
X1 Duty Cycle
X1 Period
T_high
Parameter
Parameter
T_cyc
Table 37
Figure 29
40%
Min
Min
30
11
11
1
0.2V
T_low
CC
summarizes the PCI Clock specifications.
Typical
shows the clock waveform and required
Max
40
4
Figure
Table 38
Networking Silicon — 82559
Units
V/ns
60%
Max
29.
ns
ns
ns
0.4V
defines the 82559
(minimum
Notes
Units
CC
ns
1
2
p-to-p
±50PPM
Notes
101
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