CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 86

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

4.0 Segmentation Coprocessor
4.2 Segmentation Functional Description
4.2.3 CPCS-PDU Processing
Figure 4-5. AAL5 CPCS-PDU Generation
4-8
PHY Interface
H
4.2.3.1 AAL5
(1-9 Cells)
TX_FIFO
The buffers submitted by the user contain only user data, the CPCS Service Data
Unit (CPCS-SDU). The CN8236 adds the CPCS-PDU protocol fields to the
CPCS-SDU. The SAR supports three AAL levels: AAL5, AAL3/4, and a
transparent adaptation layer (AAL0).
OAM generation in detail.
For AAL5, the SAR generates the CPCS-PDU trailer and pads the CPCS-SDU to
align the PDU to a cell boundary. The CN8236 generates the PAD, Length (LEN),
Common Part Indicator (CPI), and Cyclic Redundancy Check (CRC) fields
according to I.363. The host supplies the CPCS User-to-User Indication (UU)
field in the first buffer descriptor in a message, and the CN8236 transmits it
following I.363.
the VCC table entry. The CN8236 terminates AAL5 PDUs by setting bit 0 of the
Payload Type Identifier field, PTI[0] = 1.
activates this by setting the following fields in the SEG buffer descriptor entry to
these values: AAL_MODE = AAL5 (b00), and AAL_OPT = ABORT (b01).
uses internal circuits to generate and store PDU length and CRC-32 in the SEG
VCC table. The CN8236 transmits these fields within the EOM cell. The PAD
and CPI fields are generated internally.
Specific features also allow the generation of OAM cells.
The SAR generates the ATM header according to host-initialized settings in
The host aborts PDUs by activating an EOM SBD abort option. The host
Figure 4-5
Byte Length Counter
CRC Accumulator
H
Mindspeed Technologies
Internal
Circuits
USER DATA BUFFER(S)
illustrates the CN8236’s AAL5 PDU generation scheme. The SAR
ATM ServiceSAR Plus with xBR Traffic Management
SEG VCC Table Entry
(Set PTI[0] = 1)
ATM_HEADER
™
CRC_REM
PDU_LEN
UU
H
PAD UU CPI LEN CRC-32
Chapter
28236-DSH-001-B
7.0, covers
CN8236
8236_016