CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 313

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
28236-DSH-001-B
13.1 AALx RSM Operation
To support AALx operation, HPORT_ID and AALx_EN are added to the
reassembly VCC table entry as follows: AALx_EN is added to bit 21 of word 0.
When this bit is set high, the DPRI field is used as the HPORT_ID. For proper
operation with the AALx part, the channel must be set up per logical FIFO buffer
mode (FIFO_EN = 1), that is, AAL0 fixed termination mode with termination
length of one cell. Also, M52_EN must be a logic high. In addition, a
RSM_ROUTE_TAG is written into the upper 28 bits of the BOM_BD_PNTR
word on the RSM VCC table entry.
maintained. When the ingress FIFO buffer is written, the counter is incremented.
An edge detection circuit decrements each counter. The counter size is
programmable via the AALx_CTRL(INGRESS_DEPTH) register up to 16 cells.
Each counter is reset by either RSM_RESET or a separate reset per port.
logic high for one clock period. When a read occurs on an empty condition,
HRSMUNFLx output pulses to a logic high for one clock period. Rollover or
rollunder of the counter must be prevented.
is active in the VCC table entry, DPRI is used as the HPORT_ID. The RSM block
checks if room is available in the appropriate AALx FIFO buffer. If so, the FIFO
buffer address in the VCC table entry is used to transfer the complete cell
(52 octet mode). If not, the cell is discarded. The ATM header word is modified to
pass the RSM_ROUTE_TAG as follows: RSM_ROUTE_TAG (28 bits) | PTI (3) |
CLP (1).
Six shadow FIFO buffer counters, corresponding to each HFIFORDx input, is
When a write occurs on a full condition, HRSMOVFLx output pulses to a
When a cell is received, the normal cell lookup process occurs. If AALx_EN
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13.0 AALx Interworking
13.1 AALx RSM Operation
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