CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 383

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
16.1.3 System Clock Timing
Table 16-4. System Clock Timing
28236-DSH-001-B
NOTE(S):
(1)
(2)
Symbol
See
See
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
dh
cd
sh
dr
cf
cr
cf
sf
sl
sr
sf
df
dl
df
d
c
s
Figure 16-5
Figure 16-6
CLK2X Frequency
CLK2X Period
CLK2X Duty Cycle
CLK2X Rise Time
CLK2X Fall Time
SYSCLK Frequency
SYSCLK Period
SYSCLK High Time
SYSCLK Low Time
SYSCLK Rise Time
SYSCLK Fall Time
CLKD3 Frequency
CLKD3 Period
CLKD3 High Time
CLKD3 Low Time
CLKD3 Rise Time
CLKD3 Fall Time
for waveforms and definitions.
for waveforms and definitions. The outputs are measured with a load of 35 pF.
The system clock timing consists of the CLK2X input and the SYSCLK and
CLKD3 outputs. The CLK2X input and SYSCLK outputs are used to generate
the internal and external system clocks, SAR-shared memory, and processor read
and write timing. The CLKD3 output can be used as the ATM physical interface
clock. There is no defined skew relationship between the CLK2X input and
SYSCLK and CLKD3 outputs.
three clocks.
Parameter
Mindspeed Technologies
Figures 16-5
Output Clocks
Input Clocks
and
(1)
16-6
(2)
Table 16-4
illustrate this timing.
16.0 Electrical and Mechanical Specifications
(t
(t
(t
(t
™
S
S
D
D
15.15
Min
/2) – 2
/2) – 2
/2) – 2
/2) – 2
specifies the timing parameters of the
40
0
0
0
1
1
1
1
t
t
CF
2t
CF
3t
/2
C
/3
C
(t
(t
(t
(t
S
S
D
D
Max
/2) + 2
/2) + 2
/2) + 2
/2) + 2
66
60
6
6
4
4
4
4
16.1 Timing
Units
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
16-7