CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 74

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CN8236EBGB

Manufacturer Part Number
CN8236EBGB
Description
ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet

Specifications of CN8236EBGB

Package
388BGA
Traffic Class
ABR|CBR|GFR|UBR|VBR
Utopia Type
Level 1|Level 2
Host Interface
PCI
Maximum Data Rate
155 Mbps
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V

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3.0 Host Interface
3.3 Write-only Control and Status
Table 3-2. Write-only Control Queue Variables
3-6
WRITE
READ_UD
READ
INTERVAL
UPDATE
READ_UD_PNTR
Variable
3.3.1.1 Control
3.3.1.2 Queue
Management
Variables
Current host position in queue
Last known SAR position in queue as seen by
host
Current SAR position in queue
Number of queue entries processed by SAR
before writing READ_UD
Number of queue entries since last write of
READ_UD
SAR pointer to READ_UD
Table 3-2
Figure 3-4
initializes all of the variables described in
maintains the READ pointer. When the SAR processes a queue entry, it advances
the READ pointer (READ++). Since the queues are circular, the pointer
eventually wraps back to 0. It also advances an internal counter, UPDATE
(UPDATE++). When INTERVAL queue entries have been processed, the SAR
writes its current position in the queue, READ, to a host variable, READ_UD.
The host determines the magnitude of INTERVAL at initialization. Larger
numbers result in fewer overhead PCI accesses, but also introduces larger latency
between host updates, which reduces the effective size of the queue.
Mindspeed Technologies
describes the variables for write-only control queues.
illustrates the control queue management algorithm. The host
Definition
ATM ServiceSAR Plus with xBR Traffic Management
Host variable
Host word aligned
variable
SAR Base table
SAR register
SAR Base table
SAR Base table
Table
Location
3-2. Once the SAR is enabled, it
28236-DSH-001-B
Initialization
Host defined
&READ_UD
0
0
0
0
CN8236

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