CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 58

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

2.0 Architecture Overview
2.8 Standards-Based I/O
2-24
SAR Shared Memory I/O
To simplify system implementations, the CN8236 integrates a complete memory
controller designed for direct interface to common Static RAMs (SRAMs). The
CN8236’s memory controller operates at 33 MHz and can access up to 8 MB of
SRAM memory. The memory controller also arbitrates access to the internal
control and status registers by the host and local processors. The memory banks
can be configured to a variable number of sizes. All of this affords a wide degree
of flexibility in SAR-shared memory architecture.
Local Processor I/O
The Local Processor Interface in the CN8236 allows an optional external CPU to
be directly connected to the device to serve as a local controlling intelligence that
can handle initialization, connection management, overall data management,
error recovery, and OAM functions. The use of a local processor for these
functions allows ATM message data to flow to and from host system memory in a
substantially larger bandwidth, because the local processor is handling the
out-of-band functions described above.
connects to the CN8236 through bidirectional transceivers and buffers for the
address and data buses. This allows the processor fast access to CN8236 memory
and registers, but insulates the CN8236 from processor instruction and data cache
fills. It also allows the processor to control multiple CN8236s or PHY devices if
desired.
Boundary Scan I/O and Loopbacks
The CN8236 includes five pins for Joint Test Action Group (JTAG) Boundary
Scan, for board-level testing. The CN8236 incorporates an internal loopback
from the segmentation coprocessor to the reassembly coprocessor to facilitate
system diagnostics.
The processor interface is loosely coupled, meaning that the processor
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