CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 132

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

5.0 Reassembly Coprocessor
5.4 Buffer Management
5.4.5 Initialization of Buffer Structures
5-22
5.4.5.2 Free Buffer
5.4.5.3 Free Buffer
Queue Base Table
5.4.5.1 Buffer
5.4.5.4 Other
Queue Entries
Initialization
Descriptors
Before operation of the reassembly coprocessor is enabled, the host must initialize
these buffer structures. The initialization in this section assumes that the firewall
function is disabled (that is, RSM_FQCTRL(FBQ0_RTN) = 0), and therefore, all
free buffer queue entries are two words.
In every buffer descriptor entry, write the pointer to an available data buffer in the
BUFF_PTR field. This assigns every data buffer to its own buffer descriptor.
Allocate the size (in number of entries) of each of the 32 free buffer queues in the
RSM_FQCTRL register, (FBQ_SIZE) field, based on these values:
are taken off the free buffer queue before the CN8236 writes the current READ
index pointer to host memory. This is written to RSM_FQCTRL(FBQ_UD_INT).
buffer queue base table entry to 0s.
appropriate address.
LENGTH field of each free buffer queue base table entry.
memory locations. Normally, both structures are in host memory.
Write the base addresses of free buffer queues Banks 0 and 1 in RSM_FQBASE
(FBQ0_BASE and FBQ1_BASE).
BUFFER_PTR fields corresponding to the buffer and buffer descriptor pair. Also
write the VLD bit to a logic high.
The user can globally disable free buffer underflow protection by setting
RSM_CTRL(RSM_FBQ_DIS) to a logic high.
00 = 64
01 = 256
10 = 1,024
11 = 4,096
Initialize the free buffer queue update INTERVAL, that is, how many buffers
Initialize the FORWARD, READ, UPDATE, and EMPT fields in each free
Initialize the READ_UD_PTR field in each base table entry with the
Write the appropriate length (in bytes) for the data buffers in that queue in the
Initialize BFR_LOCAL and BD_LOCAL to the appropriate host/SAR-shared
For each allocated free buffer queue entry, write the BD_PNTR and
For each unallocated free buffer queue entry, write the VLD bit to a logic low.
Mindspeed Technologies
ATM ServiceSAR Plus with xBR Traffic Management
™
28236-DSH-001-B
CN8236