PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 94

IC INTERFACE LINE 80-MQFP

PEB2255H-V13

Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2255H-V13

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
Table 21
Alarm
Remote Alarm in
time slot 16 (TS16RA)
Loss of Signal in
time slot 16
(TS16LOS)
Alarm Indication
Signal in time slot 16
(TS16AIS)
Transmit Line Short
(XLS)
Transmit Ones Density
(XLO)
4.5.2
• Automatic remote alarm access
• Automatic E bit access
• Automatic AIS to system interface
Data Sheet
If the receiver has lost its synchronization a remote alarm can be sent automatically,
if enabled by bit FMR2.AXRA to the distant end. The remote alarm bit is set
automatically in the outgoing data stream if the receiver is in asynchronous state
(FRS0.LFA bit is set). In synchronous state the remote alarm bit is removed.
By setting bit XSP.AXS status information of received submultiframes is automatically
inserted in E-bit position of the outgoing CRC Multiframe without any further
interventions of the microprocessor.
In asynchronous state the synchronizer enforces automatically an AIS to the receive
system interface. However, received data can be transparently switched through if bit
FMR2.DAIS is set.
Auto Modes
Summary of Alarm Detection and Release (E1) (cont’d)
Detection Condition
Y-bit = 1 received in CAS
multiframe alignment word
all zeros for at least 16
consecutively received time
slots 16
time slot 16 containing less
than 4 zeros in each of two
consecutive CAS
multiframes periods
If XL1 and XL2 are
shortened for at least 32
pulses; pins XL1 and XL2
are forced into a high
impedance state
automatically, if bit
XPM2.DAXLT is reset.
32 consecutive zeros in the
transmit data stream on
XL1/2
94
Clear Condition
Y-bit = 0 received in CAS
multiframe alignment word
receiving a one in
time slot 16
time slot 16 containing more than
3 zeros in each of two
consecutive CAS multiframes
periods
After 32 consecutive pulse
periods the outputs XL1/2 are
activated again and the internal
transmit current limiter is
checked. If a short between XL1/
2 is still existing, the outputs XL1/
2 are switched into high
impedance state again. When the
short disappears pins XL1/2 are
activated automatically.
Cleared with each transmitted
pulse
Functional Description E1
FALC-LH V1.3
PEB 2255
2000-07

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