PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 314
![IC INTERFACE LINE 80-MQFP](/photos/6/94/69416/peb2255h-v13_sml.jpg)
PEB2255H-V13
Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2255H-V13.pdf
(374 pages)
Specifications of PEB2255H-V13
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN
PEB2255H-V13IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
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- Download datasheet (6Mb)
Framer Receive Status Register 2 (Read)
ESC2…ESC0… Error Simulation Counter
Tested Alarms ESC2 … 0 =
LFA
LMFA
RRA (bit2 =0)
RRA (S-bit frame 12)
RRA (DL-pattern)
LOS
EBC (F12,F72)
EBC (only ESF)
AIS
FEC
CVC
CEC (only ESF)
SLPP
SLPN
XSLP
Some of these alarm indications are simulated only if the FALC
appropriate mode. At simulation steps 0, 3, 4, and 7 pending status flags are reset
automatically and clearing of the error counters and interrupt status registers ISR0...3
should be done. Incrementing the simulation counter should not be done at time intervals
shorter than 1.5 ms (F4, F12, F72) or 3 ms (ESF). Otherwise, reactions of initiated
simulations may occur at later steps.
Data Sheet
FRS2
ESC2
7
This three-bit counter is incremented by setting bit FMR0.SIM. The
state of the counter determines the function to be tested:
For complete checking of the alarm indications, eight simulation steps
are necessary (FRS2.ESC = 0 after a complete simulation).
ESC1
ESC0
0
314
1
x
x
x
x
x
x
x
x
2
x
x
x
x
x
x
x
x
x
x
x
3
®
-LH is configured in the
4
FALC-LH V1.3
T1/J1 Registers
5
x
x
x
x
x
x
x
0
PEB 2255
6
x
x
x
x
x
x
x
x
x
2000-07
(4E)
7
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