NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 85

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NS7520B-1-I46

Manufacturer Part Number
NS7520B-1-I46
Description
IC ARM MICROPROCESSOR 177BGA
Manufacturer
Digi International
Series
NET+ARM®r
Datasheets

Specifications of NS7520B-1-I46

Applications
Network Processor
Core Processor
ARM7
Program Memory Type
External Program Memory
Controller Series
-
Ram Size
External
Interface
EBI/EMI, Ethernet, DMA, SPI, UART
Number Of I /o
16
Voltage - Supply
1.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
177-LFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Timer Status registers
PORTA Configuration register
Address: FFB0 0014 / FFB0 001C
Register bit assignment
Table 28: Timer Status registers bit definition
Address: FFB0 0020
D31
D30
D29:27
D26:00
Bits
Rsvd
15
31
30
TIP
14
N/A
R/C
N/A
R
Access
29
13
Reserved
28
12
Reserved
TIP
Reserved
CTC
Mnemonic
27
11
TCLK
26
10
N/A
0
N/A
O
Reset
25
9
24
8
N/A
Timer interrupt pending
Set to 1 when the timer is enabled and the CTC value
counts down to 0. TIP generates an interrupt to the CPU if
the TIE bit in the Timer Control register is set. Writing a 1
to the same bit position in the Timer Status register clears
the TIP bit.
Note:
N/A
Current timer count
Each time the CTC field reaches zero, the TIP bit is set and
the CTC is reloaded with the value defined in the ITC field.
The CTC continues to count back down to zero.
CTC
Description
w w w . d i g i e m b e d d e d . c o m
23
7
TIP is set immediately when the TE bit (in the
Timer Control register) is changed from 0 to 1.
An interrupt occurs immediately after TE
transitions from 0 to 1. If this initial interrupt
causes a problem in any specific application, the
software must be designed to ignore the first
interrupt after TE transitions from 0 to 1.
22
6
CTC
21
5
20
4
19
3
18
2
G E N M o d u l e
17
1
16
0
7 3

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