NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 255

• Manufacturer Part Number: NS7520B-1-I46
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-I46

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 90: Serial Channel Bit-Rate register bit definition
D28
D27
D26
D25:24
Bits
R/W
R/W
R/W
R/W
Access
TXSRC
RXEXT
TXEXT
CLKMUX
Mnemonic
0
0
0
0
Reset
Transmit clock source
0
1
Controls the source of the transmitter clock. The
transmitter clock can be provided by an internal
source, as determined by the value in the TICS field,
or by an input on the OUT2 signal attached to the
PORTC pin (configured as a special function input).
Drive receive clock external
0
1
Enables the receiver clock to be driven on the OUT1
signal attached to the PORTA/PORTC ports. When
using the OUT1 signal, the PORTA/PORTC pin must
be configured as special function output.
Drive transmit clock external
0
1
Enables the transmitter clock to be driven on the
OUT2 signal attached to PORTC port. When using
the OUT2 signal, The PORTC pin must be configured
as special function output.
BRG input clock
00
01
10
11
Controls the bit-rate generator clock source. The bit-
rate generator can use one of four clock source: the
external oscillator, the internal PLL SYSCLK output,
an input signal on the OUT1 signal on PORTA/
PORTC, or an input signal on the OUT2 signal
attached to PORTC.
When using either OUT1 or OUT2, the PORTA/
PORTC port pin must be configured as special
function input.
Description
w w w . d i g i e m b e d d e d . c o m
Internal
External (input through OUT2 signal)
Disable
Enable; drive RXCLK out OUT1 signal at
PORTA/PORTC
Disable
Enable; drive TXCLK out OUT2 signal at
PORTC
Input clock defined by F
Input clock defined by F
Input clock defined by input on OUT1
Input clock defined by input on OUT2
S e r i a l C o n t r o l l e r M o d u l e
XTALE
SYSCLK
2 4 3