NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 106

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NS7520B-1-I46

Manufacturer Part Number
NS7520B-1-I46
Description
IC ARM MICROPROCESSOR 177BGA
Manufacturer
Digi International
Series
NET+ARM®r
Datasheets

Specifications of NS7520B-1-I46

Applications
Network Processor
Core Processor
ARM7
Program Memory Type
External Program Memory
Controller Series
-
Ram Size
External
Interface
EBI/EMI, Ethernet, DMA, SPI, UART
Number Of I /o
16
Voltage - Supply
1.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
177-LFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number:
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9 4
M E M m o d u l e c o n f i g u r a t i o n
Table 37: Chip Select Base Address register bit definition
D09:08
D07
D06
Bits
R/W
R/W
R/W
Access
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
DMODE
DMUXS
EXTTA
Mnemonic
0
0
0
Reset
DRAM configuration mode
00
01
10
11
Controls the DRAM type when the memory
device is configured to operate in DRAM mode.
This field is used only when the DRSEL bit is set
to 1 (DRAM mode).
All DRAM memory peripherals must be
configured as the same type of DRAM.
DRAM address multiplexer select
0
1
Controls whether the NS7520 uses the internal
address multiplexer for this DRAM memory
peripheral.
1 indicates that an external DRAM multiplexer is
to be used for this chip select, where PORTA2
determines when the external multiplexer
switches the address bits. When the PORTA2
signal is active high, the external DRAM RAS/
CAS address multiplexer function must drive the
CAS address to the DRAM devices.
The AMUX or AMUX bits in the MMCR serve
as a global control when set. When either of
these bits is set to 1, all DRAM peripheral
devices use the external address multiplexer and
the DMUXS bit is ignored.
External TA_ configuration
0
1
Defines whether TA_ cycle termination
indication is generated internally or externally.
Note:
Description
Use internal DRAM multiplexer
Use external DRAM multiplexer
Generate internally
Generate externally
FP DRAM
EDO DRAM
SDRAM
Reserved
EXTTA is not allowed for DRAM.

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