NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 160

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NS7520B-1-I46

Manufacturer Part Number
NS7520B-1-I46
Description
IC ARM MICROPROCESSOR 177BGA
Manufacturer
Digi International
Series
NET+ARM®r
Datasheets

Specifications of NS7520B-1-I46

Applications
Network Processor
Core Processor
ARM7
Program Memory Type
External Program Memory
Controller Series
-
Ram Size
External
Interface
EBI/EMI, Ethernet, DMA, SPI, UART
Number Of I /o
16
Voltage - Supply
1.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
177-LFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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1 4 8
D M A c o n t r o l l e r r e s e t
DMA controller reset
Figure 20: Hardware needed for external memory-to-memory DMA transfers
You can simultaneously reset the DMA controllers for channels 1-13 without affecting
any NS7520 modules. Just set the DMA reset bit in the GEN module System Control
register to 1 and then back to 0 (see "DMARST" on page 66).
All DMA controllers are reset by all forms of hardware and software resets.
ADDR[X:0]
DATA{ 31:0]
Memory
CS_
R/W_
DATA[31:0]
ADDR[27:0]
DREQ_
DACK_
DONE_
R/W_
CSx_
CSx_
If the source buffer pointer points to the external device, the device, in
conjunction with appropriate memory device timing or external bus cycle
timing, provides data when DACK_ is asserted.
If the destination buffer pointer points to the external device, the device,
in conjunction with appropriate memory device timing or external bus cycle
timing, accepts data when DACK_ is asserted.
TEA_ indicates the existence and termination of burst cycles.
NS7520
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
External device
Enable
DONE
Direction
DATA[31:0]
ADDR[27:0]
CS
DREQ_

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