W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 6

• Manufacturer Part Number: W83627UHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627UHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.
11.
12.
10.1
10.2
11.1
11.2
11.3
12.1
12.2
12.3
12.4
12.5
UART PORT ........................................................................................................................... 106
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
10.2.6
10.2.7
PARALLEL PORT ................................................................................................................... 114
11.2.1
11.2.2
11.2.3
11.2.4
11.2.5
11.2.6
11.2.7
11.3.1
11.3.2
11.3.3
11.3.4
11.3.5
11.3.6
11.3.7
11.3.8
11.3.9
11.3.10
11.3.11
11.3.12
11.3.13
11.3.14
KEYBOARD CONTROLLER................................................................................................... 128
Universal Asynchronous Receiver/Transmitter (UART A, B, C, D, E, F) ......................... 106
Register Address .............................................................................................................. 106
Printer Interface Logic....................................................................................................... 114
Enhanced Parallel Port (EPP)........................................................................................... 114
11.2.7.1.
11.2.7.2.
Extended Capabilities Parallel (ECP) Port........................................................................ 119
11.3.12.1.
11.3.12.2.
11.3.12.3.
11.3.12.4.
Output Buffer..................................................................................................................... 128
Input Buffer........................................................................................................................ 128
Status Register ................................................................................................................. 129
Commands........................................................................................................................ 129
Hardware GATEA20/Keyboard Reset Control Logic........................................................ 131
UART Control Register (UCR) (Read/Write)............................................................................106
UART Status Register (USR) (Read/Write) .............................................................................109
Handshake Control Register (HCR) (Read/Write) ...................................................................110
Handshake Status Register (HSR) (Read/Write).....................................................................110
This register is used to control the FIFO functions of the UART..............................................111
Interrupt Status Register (ISR) (Read only) .............................................................................112
Interrupt Control Register (ICR) (Read/Write)..........................................................................113
Data Port (Data Swapper) .......................................................................................................115
Printer Status Buffer ................................................................................................................115
Printer Control Latch and Printer Control Swapper..................................................................116
EPP Address Port....................................................................................................................116
EPP Data Port 0-3 ...................................................................................................................117
EPP Pin Descriptions ..............................................................................................................118
EPP Operation.........................................................................................................................118
ECP Register and Bit Map.......................................................................................................120
Data and ecpAFifo Port ...........................................................................................................120
Device Status Register (DSR) .................................................................................................121
Device Control Register (DCR)................................................................................................121
CFIFO (Parallel Port Data FIFO) Mode = 010 .........................................................................122
ECPDFIFO (ECP Data FIFO) Mode = 011 ..............................................................................122
TFIFO (Test FIFO Mode) Mode = 110.....................................................................................122
CNFGA (Configuration Register A) Mode = 111......................................................................122
CNFGB (Configuration Register B) Mode = 111......................................................................122
ECR (Extended Control Register) Mode = all .....................................................................123
ECP Pin Descriptions..........................................................................................................125
ECP Operation....................................................................................................................125
DMA Transfers....................................................................................................................126
Programmed I/O (NON-DMA) Mode ...................................................................................126
EPP Version 1.9 Operation ...........................................................................................118
EPP Version 1.7 Operation ...........................................................................................118
Mode Switching ...........................................................................................................126
Command/Data ...........................................................................................................126
Data Compression.......................................................................................................126
FIFO Operation ...........................................................................................................126
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Publication Release Date: March 24, 2008
Revision 1.44