W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 153

• Manufacturer Part Number: W83627UHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627UHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The RSMRST# (Pin 75) signal is a reset output and is used as the 5VSB power on reset signal for the
South Bridge.
When the W83627UHG detects the 5VSB voltage rises to “V1”, it then starts a delay – “t1” before the
rising edge of RSMRST# asserting. If the 5VSB voltage falls below “V2”, the RSMRST# de-asserts
immediately.
Timing and voltage parameters are shown in Figure 13-3 and Table 13-3.
The PWROK (Pin 71) signal is an output and is used as both the 5VCC and 3VCC power-on reset
signal.
(LOGICAL DEVICE A,
NAME
13.3 Resume Reset Logic
13.4 PWROK Generation
V1
V2
5VSB
CR[E6H], BIT 7)
t1
ENMDAT_UP
RSMRST#
5VSB Valid Voltage
5VSB Ineffective Voltage
Valid 5VSB to RSMRST# inactive
V1
1
0
0
0
0
t1
Table 13-3 Timing and Voltage Parameters of RSMRST#
PARAMETER
(LOGICAL DEVICE
A, CR[E0H], BIT 4)
Figure 13-3 Mechanism of Resume Reset Logic
MSRKEY
x
0
1
0
1
CR[E0H], BIT 1)
DEVICE A,
(LOGICAL
MSXKEY
-138-
MIN.
100
0
1
1
0
0
2.6
-
MAX.
One click of the left or right
button.
One click of the left button.
One click of the right button.
Two clicks of the left button.
Two clicks of the right button.
Publication Release Date: March 24, 2008
200
4.3
-
WAKE-UP EVENT
UNIT
mS
V
V
W83627UHG
Revision 1.44
V2