W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 169

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W83627UHG

Manufacturer Part Number
W83627UHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheets

Specifications of W83627UHG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V, 5V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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17.2 Logical Device 0 (FDC)
CR 30h. (Default 01h)
CR 60h, 61h. (Default 03h,F0h)
CR 70h. (Default 06h)
CR 74h. (Default 02h)
CR F0h. (Default 8Eh)
7~1
7~0
7~4
3~0
7~3
2~0
BIT
BIT
BIT
BIT
BIT
0
7
6
5
4
Reserved.
Reserved.
Reserved.
READ / WRITE
READ / WRITE
READ / WRITE
READ / WRITE
READ / WRITE
R / W
R / W
R / W
R / W
R / W
R / W
R / W
R / W
0: Logical device is inactive.
1: Logical device is active.
These two registers select FDC I/O base address <100h : FF8h> on 8-
byte boundary.
These bits select IRQ resource for FDC.
These bits select DRQ resource for FDC.
000: DMA0.
1xx: No DMA active.
FIPURDWN
This bit controls the internal pulled-up resistors of the FDC input pins
RDATA#, INDEX#, TRAK0#, DSKCHG# and WP#.
0: The internal pulled-up resistors of FDC are turned on.
1: The internal pulled-up resistors of FDC are turned off. (Default)
This bit determines the polarity of all FDD interface signals.
0: FDD interface signals are active low.
1: FDD interface signals are active high.
When this bit is logic 0, it indicates a second drive is installed and is
reflected in status register A. (PS2 mode only)
Swap Drive 0, 1 Mode =>
0: No Swap.
001: DMA1.
-154-
1: Drive and Motor select 0 and 1 are swapped.
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
010: DMA2.
Publication Release Date: March 24, 2008
011: DMA3.
W83627UHG
Revision 1.44

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