W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 115

• Manufacturer Part Number: W83627UHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627UHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The 2 MB/S data rate for the tape drive is only supported by setting DRATE1 and DRATE0 to 01, as
well as setting DRT1 and DRT0 (CRF4 and CRF5 for logical device 0) to 10. Please see the functional
description of CRF4 or CRF5 and the data rate table for individual data-rate settings.
The FIFO register consists of four status registers in a stack, and only one register is presented to the
data bus at a time. The FIFO register stores data, commands, and parameters, and it provides disk-
drive status information. In addition, data bytes pass through the data register to program or obtain
results after a command. In the W83627UHG, this register is disabled after reset. The FIFO can
enable it and change its values through the configure command.
9.2.7 FIFO Register (R/W base address + 5)
BIT
1
0
PRECOMP
DATA RATE
2
0
0
0
0
1
1
1
1
250 KB/S
300 KB/S
500 KB/S
DRATE 1.
DRATE 0.
1 MB/S
2 MB/S
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0.00 ns (disabled)
250K - 1 Mbps
Default Delays
125.00 ns
166.67 ns
208.33 ns
250.00 ns
41.67 ns
83.34 ns
DEFAULT PRECOMPENSATION DELAYS
DESCRIPTION
-100-
PRECOMPENSATION DELAY
Select the data rate of the FDC and
reduced write-current control.
Bits
1 0
0 0: 500 KB/S (MFM), 250 KB/S (FM),
RWC# = 1
0 1: 300 KB/S (MFM), 150 KB/S (FM),
RWC# = 0
1 0: 250 KB/S (MFM), 125 KB/S (FM),
RWC# = 0
1 1: 1 MB/S (MFM), Illegal (FM), RWC# = 1
41.67ns
20.8 ns
125 ns
125 ns
Publication Release Date: March 24, 2008
125 ns
2 Mbps Tape drive
0.00 ns (disabled)
Default Delays
W83627UHG
125.00 ns
41.17 ns
104.2 ns
20.8 ns
83.3 ns
62.5ns
Revision 1.44