M69000 Asiliant Technologies, M69000 Datasheet - Page 350

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

BitBLT Operation
E-15
Figure E- 8: Pattern Data
(Always an 8x8 Array of Pixels)
The Pattern Address Register (BR05) is used to specify the address of the pattern data as an offset from
the beginning of the frame buffer at which the block of pattern data begins. The three least significant bits
of the address written to this register are ignored, because the address must be in terms of quadwords. This
is because the pattern must always be located on an address boundary equal to its size. Monochrome
patterns take up 8 bytes, or a single quadword of space, and therefore, must be located on a quadword
boundary. Similarly, color patterns with color depths of 8 and 16 bits per pixel must start on 64-byte and
128-byte boundaries, respectively. Color patterns with color depths of 24 bits per pixel must start on 256-
byte boundaries, despite the fact that the actual color data fills only 3 bytes per pixel.
Figures E-9, E-10, E.3-11, and E-12 show how monochrome, 8bpp, 16bpp, and 24bpp pattern data is
organized in memory.
Figure E-9: Monochrome Pattern Data -- Occupies a Single Quadword
Figure E-10: 8bpp Pattern Data -- Occupies 64 Bytes (8 Quadwords)
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69000 Databook
Subject to Change Without Notice
Revision 1.3 8/31/98