M69000 Asiliant Technologies, M69000 Datasheet - Page 182

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

XR60
read/write at I/O address 3D7h with index at I/O address 3D6h set to 60h
7
6
5-2
1-0
&+,36
Reserved
(0)
7
Reserved
This bit always returns the value of 0 when read.
Video Data Port PCLK Pin Source
0: Selects the DCLK signal as the source. This is the default after reset.
1: Selects the DCLK signal, divided by 2, as the source.
Reserved
These bits always return the value of 0 when read.
Video Data Port Configuration
00: Disables the video data port feature.
01: Enables the video data port and configures it to be used to support a standard VGA interface.
10: Reserved
11: Enables the video data port and configures it to be used to support a ZV-type feature connector.
69000 Databook
Video Pin Control Register
PCLK Pin
Source
(0)
6
5
Subject to Change Without Notice
Extension Registers
4
Reserved
(00:00)
3
2
Revision 1.3 8/31/98
1
Video Data Port
Configuration
(00)
0
14-15