M69000 Asiliant Technologies, M69000 Datasheet - Page 295

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

17-12
BR06
read/write at memory space offset 0x400018h
word or doubleword accessible
Important: This register should never be read while the BitBLT engine is busy.
31-22
21-0
&+,36
31
15
Reserved (Writable)
Source Address
30
14
69000 Databook
Source Address Register
29
13
These bits should always be written with the value of 0.
When the source data is located within the frame buffer, these bits are used to specify the
starting address of the source data within the frame buffer as an offset from the beginning
of the frame buffer to where the first byte of source data is located.
When the source data is provided by the host CPU through the BitBLT data port, and that
source data is in color, only bits 2-0 are used and the upper bits are ignored. These lower
3 bits are used to indicate the position of the first valid byte within the first quadword of the
source data.
When the source data is provided by the host CPU through the BitBLT data port, and that
source data is monochrome, the BitBLT engine ignores this register entirely.
28
12
(0000:0000:00)
27
Reserved
11
26
10
Subject to Change Without Notice
Source Address Bits 15-0
25
9
(xxxx:xxxx:xxxx:xxxx)
BitBLT Registers
24
8
23
7
22
6
21
5
Source Address Bits 21-16
20
4
19
(xx:xxxx)
3
Revision 1.3 8/31/98
18
2
17
1
16
0