M69000 Asiliant Technologies, M69000 Datasheet - Page 164

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M69000

Manufacturer Part Number
M69000
Description
Manufacturer
Asiliant Technologies
Datasheet

Specifications of M69000

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PALMASK
read/write at I/O address 3C6h
7-0
PALSTATE
read-only at I/O address 3C7h
7-2
1-0
&+,36
7
7
Pixel Data Mask
Reserved
Palette State
69000 Databook
In indexed-color mode, the 8 bits of this register are logically ANDed with the 8 bits of pixel
data received from the frame buffer for each pixel. The result of this ANDing process
becomes the actual index used to select locations within the palette. This has the effect of
limiting the choice of palette locations that may be specified by the incoming 8-bit data.
In direct-color mode, the palette is not used, and the data in this register is entirely ignored.
These 2 bits indicate which of the palette two index registers was most recently written to.
6
6
1 0
0 0
0 1
1 0
1 1
Palette Data Mask Register
Bit
Palette State Register
Palette Index Register Last Written To
Palette Write Index Register (PALWX) at I/O address 3C8h
reserved
reserved
Palette Read Index Register (PALRX) at I/O address 3C7h
5
5
Reserved
Subject to Change Without Notice
Palette Registers
Pixel Data Mask
4
4
3
3
2
2
Revision 1.3 8/31/98
1
1
DAC State
0
0
13-3

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