M69000 Asiliant Technologies, M69000 Datasheet - Page 148

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

GR04
read/write at I/O address 3CFh with index at address 3CEh set to 04h
7-2
1-0
&+,36
7
Reserved
Read Plane Select
These two bits select the memory plane from which the CPU reads data in Read Mode 0. In Odd/
Even Mode, bit 0 of this register is ignored. In Chain 4 Mode, both bits 1 and 0 of this register are
ignored. The four memory planes are selected as follows:
These two bits also select which of the four memory read latches may be read via the Memory Read
Latch Data Register (CR22). The choice of memory read latch corresponds to the choice of plane
specified in the table above. The Memory Read Latch Data register and this additional function
served by 2 bits are features of the VGA standard that were never documented by IBM.
69000 Databook
Read Plane Select Register
6
5
Reserved
Subject to Change Without Notice
Graphics Controller Registers
Bits
1 0
0 0
0 1
1 0
1 1
4
Plane Selected
Plane 0
Plane 1
Plane 2
Plane 3
3
2
Read Plane Select
Revision 1.3 8/31/98
1
0
11-5