ENC624J600-I/PT Microchip Technology, ENC624J600-I/PT Datasheet - Page 14

IC ETHERNET CTRLR W/SPI 64-TQFP

ENC624J600-I/PT

Manufacturer Part Number
ENC624J600-I/PT
Description
IC ETHERNET CTRLR W/SPI 64-TQFP
Manufacturer
Microchip Technology
Datasheets

Specifications of ENC624J600-I/PT

Package / Case
64-TFQFP
Controller Type
Ethernet Controller
Interface
SPI
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
96mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Input Voltage Range (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
117 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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ENC424J600/624J600
2.4.1
To reduce EMI emissions, common-mode chokes are
shown adjacent to the transformers on the cable
(RJ-45) side. These chokes come standard in typical
Ethernet
ENCX24J600 PHY uses a current-mode drive topol-
ogy, the transmit choke must normally be located on
the cable side of the transmit transformer. Orienting the
magnetics such that the choke is on the PHY side of the
transmit transformer usually results in a distorted,
non-compliant transmit waveform. However, some
magnetics which wrap the TX center tap wire around
the TX choke core can also be used to generate a
compliant waveform (Figure 2-6). These types of trans-
formers may be desirable in some Power-over Ethernet
(PoE) applications.
FIGURE 2-6:
The common-mode choke on the RX interface can be
placed on either the cable side or PHY side of the
receive transformer. Recommended and required mag-
netics characteristics are located in Section 17.0
“Electrical Characteristics”.
The four 75Ω resistors and high-voltage capacitor in
Figure 2-5 are intended to prevent each of the twisted
pairs in the Ethernet cables from floating and radiating
EMI. Their implementation may require adjustment in
PoE applications.
Unless the TX and RX signal pairs are kept short, they
should be routed between the ENCX24J600 and the
Ethernet connector following differential routing rules.
Like Ethernet cables, 100Ω characteristic impedance
should be targeted for the differential traces. The use of
vias, which introduce impedance discontinuities,
should be minimized. Other board level signals should
not run immediately parallel to the TX and RX pairs to
minimize capacitive coupling and crosstalk.
2.5
The LEDA and LEDB pins provide dedicated LED
status indicator outputs. The LEDs are intended to
display link status and TX/RX activity among other
programmable options; however, the use of one or both
is entirely optional. The pins are driven automatically by
the hardware and require no support from the host
microcontroller. Aside from the LEDs themselves, a
current-limiting resistor is generally the only required
component.
DS39935C-page 12
PHY
LEDA and LEDB Pins
ADDITIONAL EMI AND LAYOUT
CONSIDERATIONS
transformer
ALTERNATE TX CHOKE
TOPOLOGY
modules.
1:1 CT
Because
RJ-45
the
By default on POR, LEDA displays the Ethernet link
status, while LEDB displays PHY-level TX/RX activity.
Because the LEDs operate at the PHY level, RX
activity will be displayed on LEDB any time Ethernet
packets are detected, regardless of if the packet is valid
and meets the correct RX filtering criteria.
Normally, the device illuminates the LED by sourcing
current out of the pin, as shown in Figure 2-7. Connect-
ing the LED in reverse, with the anode connected to
V
current-limiting resistor), causes the LED to show
“inverted sense” behavior, lighting the LED when it
should be off and extinguishing the LED when the LED
should be on.
FIGURE 2-7:
Both LEDs automatically begin operation whenever
power is applied, a 25 MHz clock is present and the
Ethernet magnetics are present and wired correctly. A
connection to the host microcontroller via the SPI or
PSP interface is not required. LEDA and LEDB can,
therefore, be used as a quick indicator of successful
assembly during initial prototype development.
2.5.1
In space constrained applications, it is frequently desir-
able to use a single bi-color LED to display multiple
operating parameters. These LEDs are connected
between LEDA and LEDB, as shown in Figure 2-8.
FIGURE 2-8:
ENCX24J600 devices include two special hardware
display modes to make maximal use of a bi-color LED.
These modes are selected when the LACFG<3:0> and
LBCFG<3:0> bits (EIDLED<15:8>) are set to ‘1111’ or
‘1110’. In these configurations, the link state turns the
LED on, the speed/duplex state sets the LED color and
TX/RX events cause the LED to blink off. If a link is
present, no TX/RX events are occurring and the
speed/duplex
respectively, then the LEDB pin will be driven high while
LEDA will be driven low.
DD
and the cathode to LEDA/LEDB (through a
LEDB
LEDA
USING BI-COLOR LEDs
LEDA
or
LEDB
state
180
SINGLE COLOR LED
CONNECTION
BI-COLOR LED
CONNECTION
 2010 Microchip Technology Inc.
180
is
100
LED
Mbps/full
Bi-Color
LED
duplex,

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