ENC624J600-I/PT Microchip Technology, ENC624J600-I/PT Datasheet - Page 122

• Manufacturer Part Number: ENC624J600-I/PT
• Description: IC ETHERNET CTRLR W/SPI 64-TQFP
• Manufacturer: Microchip Technology

Specifications of ENC624J600-I/PT

• Package / Case: 64-TFQFP
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ENC424J600/624J600
REGISTER 13-2:
DS39935C-page 120
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-1
R/W-0
INTIE
r
This bit is read-only and cannot be cleared. Hardware does not modify it.
INTIE: INT Global Interrupt Enable bit
1 = INT pin is controlled by the INT status bit (ESTAT<15>)
0 = INT pin is driven high
MODEXIE: Modular Exponentiation Interrupt Enable bit
1 = Enabled
0 = Disabled
HASHIE: MD5/SHA-1 Hash Interrupt Enable bit
1 = Enabled
0 = Disabled
AESIE: AES Encrypt/Decrypt Interrupt Enable bit
1 = Enabled
0 = Disabled
LINKIE: PHY Link Status Change Interrupt Enable bit
1 = Enabled
0 = Disabled
Reserved: Write as ‘ 0 ’
PKTIE: RX Packet Pending Interrupt Enable bit
1 = Enabled
0 = Disabled
DMAIE: DMA Interrupt Enable bit
1 = Enabled
0 = Disabled
Reserved: Ignore on read, don’t care on write
TXIE: Transmit Done Interrupt Enable bit
1 = Enabled
0 = Disabled
TXABTIE: Transmit Abort Interrupt Enable bit
1 = Enabled
0 = Disabled
RXABTIE: Receive Abort Interrupt Enable bit
1 = Enabled
0 = Disabled
PCFULIE: Packet Counter Full Interrupt Enable bit
1 = Enabled
0 = Disabled
MODEXIE
R/W-0
R/W-0
PKTIE
EIE: ETHERNET INTERRUPT ENABLE REGISTER
W = Writable bit
‘1’ = Bit is set
HASHIE
DMAIE
R/W-0
R/W-0
AESIE
R/W-0
R-1
r
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
LINKIE
R/W-0
R/W-0
TXIE
TXABTIE
R/W-0
R/W-0
r
 2010 Microchip Technology Inc.
x = Bit is unknown
RXABTIE
R/W-0
R/W-0
r
PCFULIE
R/W-0
R/W-0
r
bit 8
bit 0