SGTL5000XNLA3R2 Freescale Semiconductor, SGTL5000XNLA3R2 Datasheet - Page 66

• Manufacturer Part Number: SGTL5000XNLA3R2
• Description: IC AUDIO CODEC STEREO 20-QFN
• Manufacturer: Freescale Semiconductor
• Type: Stereo Audior

Specifications of SGTL5000XNLA3R2

• Data Interface: I²C, Serial, SPI™
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 90 / 100
• Voltage - Supply, Analog: 1.62 V ~ 3.6 V
• Voltage - Supply, Digital: 1.1 V ~ 2 V, 1.62 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-UFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SGTL5000
66
BITS
1.8V
1.8V
3.3V
3.3V
15
15
14
13
12
VDDA
STARTUP_POWE
14
LINREG_SIMPLE
DAC_MONO
_POWERUP
7.0.0.17. CHIP_ANA_POWER
This register contains all of the powerdown controls for the analog blocks. The only
other powerdown controls are BIAS_RESISTOR in the MIC_CTRL register and the
EN_ZCD control bits in ANA_CTRL.
FIELD
RSVD
RUP
13
Table 18. Line Out Output Level Values
0.9
0.9
1.55
1.55
12
VAG_VAL
RW RESET
RW
RW
RW
RW
11
0x0
0x1
0x1
0x1
10
3.3V
1.8V
1.8V
3.3V
9
Reserved
While DAC_POWERUP is set, this allows the DAC to be put
into left only mono operation for power savings.
0x0 = Mono (left only)
0x1 = Stereo
Power up the simple (low power) digital supply regulator. After
reset, this bit can be cleared IF VDDD is driven externally OR
the primary digital linreg is enabled with
LINREG_D_POWERUP
0x0 = Power down
0x1 = Power up
Power up the circuitry needed during the power up ramp and
reset. After reset this bit can be cleared if VDDD is coming
from an external source.
0x0 = Power down
0x1 = Power up
VDDIO
8
7
1.55
0.9
0.9
1.55
LO_VAGCNTRL
0x0030
6
DEFINITION
5
4
0x06
0x0F
0x19
0x0F
LO_VOL_*
SGTL5000 EA2 DS-0-3
3
2
1
0