SGTL5000XNLA3R2 Freescale Semiconductor, SGTL5000XNLA3R2 Datasheet - Page 6

• Manufacturer Part Number: SGTL5000XNLA3R2
• Description: IC AUDIO CODEC STEREO 20-QFN
• Manufacturer: Freescale Semiconductor
• Type: Stereo Audior

Specifications of SGTL5000XNLA3R2

• Data Interface: I²C, Serial, SPI™
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 90 / 100
• Voltage - Supply, Analog: 1.62 V ~ 3.6 V
• Voltage - Supply, Digital: 1.1 V ~ 2 V, 1.62 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-UFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SGTL5000
Test Conditions unless otherwise noted: VDDIO=3.3V, VDDA =3.3V, Ta=25C, Slave mode, Fs = 48kHz, MCLK = 256Fs, 24 bit
input. ADC tests were conducted with refbias = -37.5%, all other tests conducted with refbias = -50%
6
PSRR (200mVp-p @ 1kHz on VDDA)
Symbol
1.3.
Tpc
SNR
THD+N
Frequency Response
(-60dB input)
Timing Specifications
1.3.1.
Time from all supplies powered up and SYS_MCLK
present to initial communication
CTRL_ADR0_CS
VDDD (if used)
CTRL_DATA
Parameter
SYS_MCLK
CTRL_CLK
Power Up Timing
The SGTL5000 has an internal reset that is deasserted 8 SYS_MCLK cycles after
all power rails have been brought up. After this time communication can start..
* 1uS represents 8 SYS_MCLK cycles at the minimum 8MHz SYS_MCLK.
VDDIO
VDDA
Parameter
Table 4. Audio Performance
Table 5. Power Up Timing
Figure 1. Power Up Timing
Min
Tpc
97
-85
+/-.11
89
Typical
Min
1*
Initial
Communication
Typical
Max
SGTL5000 EA2 DS-0-3
dB
dB
dB
dB
Max
Unit
Unit
uS