SGTL5000XNLA3R2 Freescale Semiconductor, SGTL5000XNLA3R2 Datasheet - Page 41

• Manufacturer Part Number: SGTL5000XNLA3R2
• Description: IC AUDIO CODEC STEREO 20-QFN
• Manufacturer: Freescale Semiconductor
• Type: Stereo Audior

Specifications of SGTL5000XNLA3R2

• Data Interface: I²C, Serial, SPI™
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 90 / 100
• Voltage - Supply, Analog: 1.62 V ~ 3.6 V
• Voltage - Supply, Digital: 1.1 V ~ 2 V, 1.62 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-UFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SGTL5000 EA2 DS-0-3
5.10. Control
5.10.1. I2C
When the measured audio level is below threshold, the AVC can apply a maximum
gain of up to 12dB. The maximum gain can be selected, either 0, 6 or 12dB. When
the maximum gain is set to 0dB the AVC acts as a limiter. In this case the AVC will
only take effect when the signal level is above the threshold.
The rate at which the incoming signal is attenuated down to the threshold is called
the attack rate. Too high of an attack will cause an unnatural sound as the input sig-
nal is distorted. Too low of an attack may cause saturation of the output as the
incoming signal will not be compressed quickly enough. The attack rate is program-
mable with allowed range of 0.05dB/s to 200dB/s.
When the signal is below the threshold, AVC will adjust the volume up until either
the threshold or the maximum gain is reached. The rate at which this volume is
changed is called the decay rate. The decay rate is programmable with allowed
range of 0.8dB/s to 3200dB/s. It is desirable to use very slow decay rate to avoid
any distortion in the signal and prevent the AVC from entering a contiuous attack-
decay loop.
Please refer to section 6.2.4.5 and section 6.3.7 for a programming example that
shows how to configure AVC and how to enable/disable AVC respectively.
The SGTL5000 supports both I2C and SPI control modes. the CTRL_MODE pin
chooses which mode will be used. When CTRL_MODE is tied to ground, the con-
trol mode is I2C. When CTRL_MODE is tied to VDDIO, the control mode is SPI.
Regardless of the mode, the control interface is used for all communication with the
SGTL5000 including startup configuration, routing, volume, etc.
The I2C port is implemented according to the I2C specification v2.0. The I2C inter-
face is used to read and write all registers.
For the 32QFN version of the SGTL5000, the I2C device address is 0n01010(R/W)
where n is determined by I2C_ADR0_CS and R/W is the read/write bit from the I2C
protocol.
For the 20QFN version of the SGTL5000 the I2C address is always 0001010(R/W).
The SGTL5000 is always the slave on all transactions which means that an external
master will always drive CTRL_CLK.
In general an I2C transaction looks as follows.
All locations are accessed with a 16 bit address. Each location is 16 bits wide.
An example I2C write transaction follows:
•
•
•
Start condition
Device address with the R/W bit cleared to indicate write
Send two bytes for the 16 bit register address (most significant byte first)
SGTL5000
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